March 15, 2010 | IBM is intent on keeping Moore in business for the next 15 years. IBM researchers have partnered with two Swiss institutes to understand how the latest chip cooling techniques can support a 3D chip architecture. A vertical integration of chips could overcome current limitations of Moore's Law, ensuring that the number of transistors on a chip doubles every 18 months.
IBM, École Polytechnique Fédérale de Lausanne (EPFL) and the Swiss Federal Institute of Technology Zurich (ETH) signed a four-year collaborative project called CMOSAIC considering a 3D stack-architecture of multiple cores with a interconnect density from 100 to 10,000 connections per millimeter square. Researchers believe that these tiny connections and the use of hair-thin, liquid cooling microchannels measuring only 50 microns in diameter between the active chips are the missing links to achieving high-performance computing with future 3D chip stacks. IBM